1. Field of the Invention
The subject invention relates to computer systems, and more particularly, to a sequence controller of an instruction processing unit (IPU) for placing the IPU in a ready, go, hold-on-new, hold-on-old, or cancel state depending upon the existence or status of certain conditions which were created during the execution of prior instructions.
2. Description of the Prior Art
Sequence control is an important consideration when designing a data processing system. This is especially true in a bus structured system. A bus structured system is composed of a number of functional units, each unit being responsible for a dedicated function. Each unit operates independently of one another If a data processing system requires that an operation be performed by two or more of the functional units, the system may perform the operation serially, or the system may perform the operation in parallel Using the serial approach, when a first sub-operation is completed by one of the two functional units, a second sub-operation commences by the other of the two functional units until the operation is complete.
Using the parallel approach, each free unit (ones which are not busy with another operation), among the two or more functional units involved in the operation, performs whatever steps it can in the operation, without the assistance of the other functional units, and subsequently completes the operation when the other functional units become available.
In the data processing system, a sequence controller is responsible for implementing either the serial approach or the parallel approach to performing the operation. If the sequence controller implements the serial approach, a longer period of time elapses during the performance of the operation than would be the case if the sequence controller implemented the parallel approach For example, if a processor in a data processing system is ready to execute an instruction which requires the use of two operands, and only one operand is available, using the serial approach, the processor must leave its "ready" state, with respect to the execution of such instruction, and stand ready to execute another instruction; or, if another functional unit is required in order to execute the instruction, and the other functional unit is busy when the execution of the instruction is scheduled to commence, using the serial approach, the processor must leave its "ready" state, with respect to execution of such instruction, and stand ready to execute another instruction if needed However, using the parallel approach, the processor need not leave its "ready" state, with respect to execution of such instruction, rather, it holds its preliminary results in storage until the other operand is available or until the other functional unit is no longer busy. Therefore, the performance of a data processing system, utilizing the serial approach to processing, is inferior to the performance of a data processing system which utilizes the parallel approach to processing.